/*
 * THIS IS THE ADD ON Komment
 *
 * */

#include <avr/io.h>
#include <stdlib.h>
#include <util/delay.h>

void clock_init(void);
void port_init(void);

int main(void)
{
	clock_init();
	port_init();

	while(1)
	{
		PORTC.OUTTGL = PIN0_bm;		// Toggle PORTC.PIN0
		_delay_ms(1000);
	}
}


void clock_init(void)
{
	// --startup clk: internal 2MHz
	// --enable 32MHz clk
	OSC.CTRL|=OSC_RC32MEN_bm;

	// --wait for stable 32MHz clk
	while (!(OSC.STATUS & OSC_RC32MRDY_bm)) {}

	// --DFLL enabled on 32MHz clk with internal 32KHz oscillator
	DFLLRC32M.CTRL|=DFLL_ENABLE_bm;

	// --switch to 32MHz clk
	//   clock control in module CLK.
	//   timed sequence needed !!
	CCP=CCP_IOREG_gc; // change protected IO reg
	CLK.CTRL = (CLK.CTRL & ~CLK_SCLKSEL_gm) | CLK_SCLKSEL_RC32M_gc;
	CLK.PSCTRL = CLK_PSADIV_1_gc | CLK_PSBCDIV_1_1_gc; //divide A,B,C by one
}

void port_init(void)
{
	// set PIN0 as output
	PORTC.DIRSET = PIN0_bm;
}
